Marco is an expert in delivering deep-tech prototypes and products. He holds a joint CERN/SSSUP PhD in Innovative Technologies and he specialises on highly constrained systems. Marco innovation track-record comprises the first smart-city testbed in Europe, a key component in large-scale optical networks, the CERN largest electronics upgrade and the first commercial wireless VR Headset.
From small scale software solutions to multi-million units per year hardware chips, Marco has always focused on quality, reliability and time to market. Marco brings Industry best-practices into Research and ingenuity into Development.
Career history
DisplayLink/Synaptics - FPGA, DevOPS, EDA Team leader. First Wireless VR Headset.
Imagination Technologies – FPGA Designer. Supported 3 chips tapeouts/bringup in 12 months.
CERN – FPGA/Embedded Designer. Collaborated in the largest revamp of ATLAS Electronics.
SSSUP – Embedded Developer. First smart-city testbed in Europe.
Qualifications
Joint CERN/Scuola Superiore Sant’Anna, PhD, Innovative Technologies, Embedded Systems
Research interests
Highly constrained systems
FPGA Acceleration
IOT
Publications
Distributed Quantum Computing and Network Control for Accelerated VQE
Patents
- Power-aware transmission of quantum control signals (GB 2607923, GB 2608030, AU 2022292146, EP 22727971.8, US 17/349,681)
- Quantum computing apparatus and associated methods (US 17/657,306, PCT/GB2023/050801)
- Method of operating a quantum control device (PCT/GB2023/052647)
Media
On the Cutting Edge of Controlling Qubits, New Electronics - March 2024
Quantum Computing Can Learn Sustainability Lessons from AI - IoT World Today, July 2024
Latest updates
View the latest updates from Marco below.
![Engineering Error Correction: Riverlane patent reduces quantum’s power bills](/media/pkhnvu1p/twopatents.jpg?anchor=center&mode=crop&quality=80&width=800&height=480&rnd=133546386384700000)
Engineering Error Correction: Riverlane patent reduces quantum’s power bills
![Engineering Quantum Error Correction: How our no-code low power compression unlocks fault tolerant operations](/media/il5doccm/banner-control.jpg?anchor=center&mode=crop&quality=80&width=800&height=480&rnd=133120570143970000)
Engineering Quantum Error Correction: How our no-code low power compression unlocks fault tolerant operations
![Engineering Quantum Error Correction: The Deadtime Challenge](/media/aaldfli2/orange-kettle.png?anchor=center&mode=crop&quality=80&width=800&height=480&rnd=133439010826570000)
Engineering Quantum Error Correction: The Deadtime Challenge
![Riverlane patents landmark error correction technology](/media/ucdhcglo/patent.png?anchor=center&mode=crop&quality=80&width=800&height=480&rnd=133316515875030000)
Riverlane patents landmark error correction technology
![A major step towards the world’s first universal quantum operating system](/media/hnmbhgnz/news_23.jpg?anchor=center&mode=crop&quality=80&width=800&height=480&rnd=133123585578400000)
A major step towards the world’s first universal quantum operating system
Explore more
View biographies for other Riverlane team members.