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Riverlane presents ‘Towards Controlling Fault-Tolerant Quantum Computers’

Riverlane presents ‘Towards Controlling Fault-Tolerant Quantum Computers’
Kenton Barnes
14 August, 2023

Riverlane invites you to the ‘Towards Controlling Fault-Tolerant Quantum Computers’ workshop at the IEEE Quantum Week 2023. 

The workshop will bring together academic and industry experts to highlight the recent progress made in the field of quantum error correction (QEC), and the upcoming challenges for controlling fault-tolerant devices at scale. Together with world-leading software and hardware specialists across qubit technologies, our goal is to foster dialogue between fault-tolerant quantum computing experts to create a shared understanding of the next steps towards demonstrating fault-tolerant quantum computation.  

The workshop will be held as part of IEEE Quantum Week 2023 – September 17-22 with both in-person and virtual attendance.

Our workshop will take place on Wednesday September 20th. 

Register here:


Fault Tolerant Quantum Computing (FTQC) is seen as a requirement for reaching useful quantum advantage. Hardware companies, academic groups and national labs have demonstrated significant progress with small error-corrected systems, but there remain many challenges for controlling fault-tolerant devices at scale. Beyond the existing hurdles in controlling NISQ devices - such as increasing qubit counts and the fidelity of control signals - FTQC has the added complexities such as mid-circuit measurement, real-time decoding and fault-tolerant circuit design.  

Leading experiments have demonstrated coordination of up to 49 qubits in a QEC context, but achieving full fault-tolerant computation will require millions of qubits. As this system grows so does the amount of syndrome data to be processed; moving this information through different layers of the quantum control stack and decoding it with the required throughput, is one of the potential challenges that requires multidisciplinary collaboration.  

This workshop aims to go beyond considering the ingredients for FTQC individually and will look at the system as a whole. During the session, we will explore current successes in controlling small error-corrected devices, whilst uncovering the early challenges that have arisen when scaling up to larger experiments. The workshop will feature a panel discussion on the next challenges and milestones towards full fault tolerance and how to approach system integration for these complex devices. We want to foster a dialogue between FTQC experts, from code designers to classical control system engineers, to create a shared understanding of the next steps towards demonstrating fault-tolerant devices at scale.  

Workshop schedule and speakers

Workshop abstracts 

Mark Saffman 

Title: Controlling neutral atom quantum computers – it’s all in the light 

Abstract: The wiring of neutral atom quantum computers is optical, be it for qubit initialization, measurement, and gate operations. Fault tolerant operation will require new capabilities as regards both fidelity of control pulses in space and time, and the ability to heterogeneously apply controls across large arrays.  

Solutions based on off the shelf components as well as directions for further development will be discussed. 

Boris Varbanov 

Title: Neural network decoder for near-term surface-code experiments 

Abstract: Neural-network decoders can achieve a lower logical error rate than conventional decoders, like minimum-weight perfect matching, when decoding the surface code. Furthermore, these decoders require no prior information about the physical error rates, making them highly adaptable.  

In this talk, we explore the performance of such a decoder on both simulated and experimental data and show that it achieves a lower logical error rate than minimum-weight perfect matching, approaching the performance of a maximum likelihood decoder. To demonstrate the flexibility of this decoder, we incorporate the SoE information available in the analog readout of transmon qubits and find that this can further lower the achieved logical error rates. The good logical performance, flexibility, and computational efficiency make neural network decoders well-suited for near-term quantum memory experiments. 

Sabrina Hong 

Title: Scaling a superconducting surface code logical qubit 

Abstract: Earlier this year, we were able to show the measurement of logical qubit performance scaling across several code sizes, and demonstrate that our system of superconducting qubits has sufficient performance to overcome the additional errors from increasing qubit number.  

In this talk, I'll be going over some challenges we encountered with calibration, control, and improving overall performance and the strategies we employed to overcome those challenges. 

Ted Yoder 

Title: Small QEC experiments and the path to large fault-tolerant devices 

Abstract: It’s an exciting time for quantum error-correction as devices become big enough and accurate enough to perform informative fault-tolerant experiments.  

I will describe some of these experiments on heavy-hex devices at IBM, featuring an error-corrected quantum memory and magic-state preparation. Then, I will discuss a well-performing family of higher rate LDPC codes and the potential for implementing them on superconducting hardware. 


  • Matt Reagor, Rigetti 
  • Glenn Jones, Rigetti 
  • Kenton Barnes, Riverlane 
  • Rossy Nguyen, Riverlane 


Register here:

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