A fault-tolerant quantum computer needs a fast decoder and a steady supply of high-quality |0⟩ states for syndrome extraction. A recent paper introduces a novel way to reduce errors in the preparation of these |0⟩ states, which could enable demonstrations of quantum error correction on early-stage hardware.
The conventional approach is to prepare two |0⟩ states, then compare them using a CNOT gate and a measurement. If the measurement is zero, suggesting that the qubits were prepared identically, we have increased confidence that the unmeasured qubit is in the |0⟩ state.
We can repeat this process until we reach the level of quality desired.
Waiting for repeated attempts when we measure 1 instead of 0 greatly complicates the scheduling of processes such as syndrome extraction. Our paper presents an alternative.
We introduce a family of low depth CNOT and Toffoli circuits which permute the computational basis to produce high-quality |0⟩ states on the first attempt, without the repeats that can be required by post-selection.
Our models (available to everyone on GitHub here) suggest meaningful performance enhancements once two-qubit gate fidelities go below 0.2%. We would very much like to see data on the practical effect of running our circuits on real quantum computing hardware.
If you have any questions about the code or collaborating with Riverlane, please reach out to the team at team@riverlane.com.