NVIDIA today announced NVIDIA Ising, an open AI model family for quantum error correction and calibration. Riverlane is among the early evaluators of Ising Decoding. We want to use this moment to share our perspective on the decoding problem itself: what it demands, how we have approached it, and what we think this latest development means for the field.
Why real-time decoding matters
Quantum Error Correction (QEC) is the key to scaling quantum computers from today’s noisy devices to systems capable of running useful algorithms. To get there, error rates must be reduced from around one in a thousand operations to as low as one in a billion or beyond.
In an error-corrected quantum computer, logical qubits are encoded across many physical qubits. Errors are detected through repeated measurements, generating a continuous stream of syndrome data. This data must be decoded and fed back into the system within extremely tight time constraints.
For leading platforms such as superconducting qubits, this cycle runs on the order of one microsecond per round. In this regime, the decoder is not just part of the system, it sets the logical clock speed of the quantum computer.
To enable fault-tolerant quantum computing, decoders need to satisfy three properties:
- High accuracy, to minimise qubit overhead
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High throughput, to handle error syndromes and prevent a data backlog
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Low latency, to meet real-time feedback requirements
A key performance metric is Lambda (Λ), which measures how effectively logical errors are suppressed as the code scales. Higher Lambda means more error suppression and a lower qubit overhead.
Riverlane’s approach: hardware-efficient, high accuracy, high throughput and low-latency decoding
We focus on meeting these core performance constraints, using whatever technology is best suited to solve the problem in practice, not just in theory. That work underpins Deltaflow 2, the most recent version of our real-time QEC system.
Our Local Clustering Decoder (LCD), recently published in Nature Communications, is designed for real-time performance on quantum hardware and is the core component of Deltaflow. It is based on a parallelised Union-Find algorithm, exploiting the clustered nature of errors in the surface code. By identifying and processing clusters in parallel, LCD achieves the speed required for real-time operation while maintaining strong accuracy, operating within sub-microsecond latency per round.
LCD is implemented on FPGAs, enabling high-throughput, low-latency decoding. As systems scale, this approach naturally extends to ASICs, which provide further gains in efficiency, power consumption, and cost.
Improving accuracy with adaptive decoding
Beyond speed, maintaining high accuracy under realistic noise conditions is essential. Deltaflow incorporates adaptive error modelling, allowing it to respond dynamically to changes in the underlying noise, including challenging effects such as leakage.
This adaptability delivers significant gains in performance. In particular, we observe Lambda squaring in some regimes with high leakage, corresponding to a fourfold reduction in qubit overhead. Future iterations of Riverlane’s QEC system, Deltaflow, will extend these capabilities further with techniques such as correlated and multi-pass decoding.
Pre-decoding and the role of AI
A growing area of interest in QEC is the use of pre-decoders, preprocessing steps that simplify syndrome data before it reaches the main decoder.
In principle, pre-decoding can reduce the workload of the global decoder and improve overall performance. However, it introduces a critical trade-off:
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The pre-decoder must be fast enough to justify its inclusion
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It must not degrade overall decoding accuracy
Previous work, including Riverlane’s own research into partial decoding, has shown how difficult it is to achieve both simultaneously, particularly as systems scale.
NVIDIA’s AI pre-decoder: progress and open questions
The recent work from NVIDIA explores a machine-learning-based pre-decoder accelerated by GPUs.
This approach is particularly notable for its local design, which avoids the need for retraining across different logical circuits, a key limitation of earlier AI-based decoders.
Benchmarking against correlated matching (the current real-time baseline), NVIDIA demonstrates regimes where pre-decoding can improve performance. However, there are still trade-offs, with some scenarios showing reduced accuracy.
Key challenges remain:
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Achieving sub-microsecond latency required for real-time QEC in fast qubit types
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Maintaining high Lambda at larger code distances and lower error rates
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Scaling AI models without increasing inference time
These are active areas of research, and further advances in hardware and model optimisation will be critical.
A complementary future for QEC hardware
As the field evolves, it is increasingly clear that no single approach will solve every part of the QEC challenge.
At Riverlane, we see a heterogeneous future where:
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ASIC-based decoders deliver deterministic, ultra-low-latency performance for real-time feedback
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GPUs and AI techniques enhance specific stages of the QEC stack
Riverlane has been working on GPU applications in QEC for some time, and we recently opened a dedicated research team in Delft, led by Barbara Terhal, focusing specifically on AI for QEC. We are excited to see NVIDIA tackling this challenge, and we look forward to working with them on pre-decoders and other applications of GPUs in QEC.
Building toward utility-scale quantum computing
Decoding sits at the heart of quantum error correction. It determines how quickly quantum computers can scale, how many physical qubits are needed per logical qubit, and ultimately how soon quantum computing delivers value at utility scale.
Deltaflow is Riverlane's answer to that challenge today: a real-time QEC system built for the performance demands of utility-scale quantum computing. What NVIDIA is building with Ising is part of the broader ecosystem that will push the field further. We are excited to see where it leads.
(Joan will be presenting on this topic at NVIDIA Quantum Day on April 14, followed by a live Q&A — register to watch at https://www.nvidia.com/en-us/events/quantum-day/ )