Digital Design Engineer

Riverlane’s mission is to make quantum computing useful, sooner. From climate change to healthcare, large and reliable quantum computers will help solve some of the world’s biggest challenges. Riverlane is building the quantum error correction layer to make this happen sooner. It’s a complex problem that requires a range of skills, talent and passion. We’re making remarkable progress and growing fast.

You will design and implement the world’s first control system for fault tolerant quantum computing. The hardware is a scaled-out, real-time, low-latency system that synchronizes high accuracy, high speed pulses. You will work closely with our external partners, and with our engineering, product and quantum physics teams to define, build and deliver this system.

We are building something unique, complex and large-scale so being comfortable with engineering to evolving specs is key. You are happy to get hands-on quickly in areas outside your own expertise. Our ideal candidate works well with different people and has a ship mentality. You will learn Quantum Computing along the way.  

We will also consider part-time applications for this role. Please indicate your preferred working schedule in your cover letter.

• Implement the first-generation fault tolerant quantum computing system
• Translate ideas into micro-architecture specifications
• Writing RTL with a design by construction mindset and using some of the best industry practices, integrating them into SoC and taking them through to implementation
• Work with the verification and validation team to ensure high quality of the design

• Good communication skills, attention to detail and passion to continuously improve processes and flows
• Experience of writing RTL using VHDL or System Verilog
• Understanding of peripheral interfaces such as SPI and PCIe and standard bus protocols like AMBA and Wishbone
• Experience in hardware flows such as RTL linting, CDC checks, STA etc
• Familiarity with verification methodologies such as functional and code coverage
• Knowledge of C/C++/Rust to assist firmware and software suite bring up
• Experience of building hardware models to rapidly prototype designs
• Experience automating work using Python/Bash/Tcl, git, CI.

• A comprehensive benefits package that includes private medical insurance, life insurance and a contributory pension scheme.
• Equity so that our team can share in the long-term success of Riverlane
• 28 days annual leave plus bank holidays and enhanced family leave
• A diverse work environment that brings together experts in many fields (including software and hardware development, quantum information theory, physics, maths and many more) and over 20 different nationalities.
• A learning environment that encourages individual, team and company growth and learning, including an annual training and conference budget for each staff member.